对话徐直军：被低估的灵衢 重新理解AI算力

Drawing on public remarks from Huawei Rotating Chairman Xu Zhijun and Chief Semiconductor Scientist Liao Heng, this article sheds light on Huawei’s previously underdiscussed core AI computing power strategy, offering readers a clearer understanding of the real value dynamics of AI compute.

1. First, it corrects a widespread public misconception: the core bottleneck for AI compute is no longer the raw performance of individual AI chips. When thousands or tens of thousands of chips work in tandem, cross-chip data latency, communication overhead, and link failures can significantly erode single-chip performance, creating a massive gap between purchased peak compute capacity and actually usable, effective compute.

2. Huawei’s newly highlighted Lingqu interconnect technology is the core solution to this problem. Paired with the Peerium computing architecture, it can enable millions of processors to operate as seamlessly as a single computer, cutting cross-device protocol conversion overhead. For hardware enablement, Huawei has adopted the near-packet optics (NPO) route, which delivers 40% lower costs than alternative industry approaches while simplifying maintenance.

3. The rollout timeline for related products is clearly defined: the Ascend 950 is already on the market, a 256,000-card cluster is being deployed, and the 960 system has entered testing. Next year will see a wave of large models natively trained on Ascend hardware, and the Lingqu protocol will be opened to the entire industry to support joint ecosystem development.

The AI computing strategy outlined by Huawei Rotating Chairman Xu Zhijun at the 2026 Huawei Connect conference offers high-value reference for tech brands’ decision-making across technology communications, product R&D, and ecosystem building.

1. For brand communications: Last year, Huawei released its chip roadmap to address supply chain skepticism and build market confidence; this year, it is shifting focus to explaining its system-level Lingqu interconnect technology, gradually revealing its full-stack technical capabilities to avoid brand value being overshadowed by association with a single chip product. This carefully paced communications approach is a valuable model for deep tech brands.

2. For product R&D: The decision-making logic of compute customers has evolved. Leading large model developers no longer focus solely on single-chip peak specifications, but instead prioritize actual model floating-point compute utilization, training task stability, and total cost of ownership. Brands should design R&D around real user value rather than simply stacking hardware specs.

3. For ecosystem building: Huawei’s decision to open its core Lingqu interconnect protocol to co-build industry standards across the supply chain, and its selection of the NPO route—which balances performance, 40% cost reduction, maintenance convenience, and supply chain maturity—will enable easier large-scale deployment and reinforce the brand’s industry leadership position.

Xu Zhijun’s disclosures on the rollout timeline, technical advantages, and ecosystem opening strategy of Huawei’s AI compute product line clarify market opportunities, shifting demand, and operational considerations for players across the compute sector.

1. Clear incremental market opportunities: The Ascend 950PR for inference scenarios is already commercially available, while the 950DT for training scenarios is expected to enter mass supply from late this year to next year. A large share of large model training demand will shift to Ascend 950 supernodes and clusters next year. As current production capacity for related products remains tight, sellers that lay out early for related product sales and supporting services will be first to capture incremental gains.

2. Clear shifts in customer demand: Buyers no longer make decisions purely based on price comparisons or peak compute scale. Their core priorities are model floating-point compute utilization, task operation stability, training iteration speed, and total cost of ownership. Ascend supernodes powered by Lingqu technology, already validated by top-tier customers, represent a core sales differentiator.

3. Clear ecosystem partnership opportunities: Huawei has opened the Lingqu UB protocol to invite cross-industry adaptation. Sellers can pre-position for related adapted products and value-added services, while avoiding the marketing pitfall of hyping single-chip performance alone, and instead highlighting system-level practical use value.

Huawei’s clearly defined AI compute technology roadmap and large-scale deployment timeline provide clear guidance on product design direction, order opportunities, and technology reserve planning for upstream and downstream hardware manufacturing factories, based on public announcements from Huawei Rotating Chairman Xu Zhijun and Chief Semiconductor Scientist Liao Heng.

1. Clear product design and production demand: The unified Lingqu interconnect protocol will cover all interconnection scenarios within cabinets, between cabinets, and across data centers, requiring related switch chips, NPUs, CPUs, and optical interconnect components to align with unified protocol standards. Huawei has confirmed it will adopt the NPO (near-packet optics) route rather than the CPO route, which will drive large-scale demand for related Hi-ONE optical engine modules, short-reach on-board copper connections, and supporting optical connection components. The NPO route reduces costs by roughly 40%, is more friendly to supply chain division of labor and post-deployment maintenance, and is well suited for mass production.

2. High certainty for bulk order opportunities: The Ascend 950 is already on the market, a 256,000-card cluster is being deployed, and the NPO-powered Ascend 960 system has entered testing. Training-focused compute products will enter mass supply next year, with supporting hardware production orders to be released on an ongoing basis.

3. Factories can build technology reserves in advance around production processes related to the unified interconnect protocol and NPO optical interconnects, aligning with the iteration rhythm of Huawei’s UB technology from version 1.0 to 2.0 and 2.1, to capture bulk order opportunities from computing infrastructure buildout.

Insights on AI compute industry development shared by Huawei Rotating Chairman Xu Zhijun and Chief Semiconductor Scientist Liao Heng at the 2026 Huawei Connect conference clarify technology trends, customer pain points, and service layout directions for service providers.

1. For industry development trends: AI compute competition has moved beyond single-chip performance rivalry to enter the stage of system-level compute efficiency competition. Interconnect technology and system architecture carry growing weight in determining effective compute output. Unified, open interconnect protocols and all-optical interconnect are confirmed future directions for AI computing.

2. For current core customer pain points: In large model training, multi-chip collaboration incurs high communication overhead, cross-layer protocol conversion costs are elevated, and single-card failures or transient link anomalies can cause massive losses for long-running training tasks. There is a wide gap between procured peak compute and available effective compute, with low model floating-point compute utilization directly driving up training costs.

3. Clear actionable service directions: Service providers can leverage Huawei’s Peerium computing architecture, unified Lingqu interconnect technology, and NPO all-optical supernode products to deliver high-utilization, high-stability compute support services for customers, helping them reduce costs and improve efficiency in coordination with Huawei’s native efficiency optimization support. They can also pre-position for adaptation and O&M services following the opening of the Lingqu protocol to capture ecosystem dividends.

The AI compute industry development path and product rollout timeline disclosed by Huawei Rotating Chairman Xu Zhijun provide clear guidance for compute service platforms and industry ecosystem platforms on resource setup, investment attraction and operation, and risk mitigation.

1. Platforms should accurately match core industry demand: What large model enterprises and compute customers need is not simply stacked peak compute capacity, but system-level compute services with high model floating-point compute utilization, high operational stability, and low comprehensive training costs. When building compute resources, platforms should prioritize validated architectures and products that support efficient multi-chip collaboration, to reduce losses from communication overhead and failures.

2. Clear direction for platform investment attraction and ecosystem building: Huawei is opening the Lingqu UB interconnect protocol to drive cross-industry co-construction of industry standards around NPO technology and unified interconnects. Platforms can target recruitment of hardware vendors, software service providers, and model developers adapted to the Lingqu protocol to build a collaborative compute ecosystem under a unified protocol.

3. Platform operators should proactively avoid market pitfalls: Steer clear of low-dimensional competition focused solely on comparing single-chip parameters and peak compute scale, and avoid making blind bets on technology routes that have not met mass deployment requirements in terms of cost, maintainability, and supply chain maturity. At the same time, reserve Ascend 950-related compute resources in advance to prepare for the coming surge in large model training demand next year.

The AI computing architecture innovations, technology route choices, and ecosystem building practices shared by Huawei Rotating Chairman Xu Zhijun and Chief Semiconductor Scientist Liao Heng provide rich new observation samples and research directions for AI compute industry research.

1. Key new industry dynamics merit close attention: The competitive focus of AI compute is shifting from single-chip performance to system-level effective compute, with cross-chip interconnect technology emerging as a core variable affecting compute efficiency. Huawei’s proposed Peerium computing architecture and Lingqu unified bus protocol aim to break down the traditional boundary between internal computer buses and external networks, enabling unified protocol interconnection for large-scale device groups and supporting collaboration across millions of processors as if they were a single computer—representing a key innovation direction for computer architecture design.

2. Practical solutions to common industry challenges hold significant research value: Fault tolerance for ultra-large-scale clusters, mitigation of communication overhead, and improvement of compute utilization are widespread industry pain points. Huawei reduces failure impact through near-fault-point error detection and retransmission, path redundancy, and light source redundancy designs, and has selected the NPO route to balance performance, a 40% cost advantage, supply chain division of labor, and maintainability, providing a pragmatic reference for industry technology route selection.

3. Clear business model and policy implications: Huawei’s ecosystem model—first validating Lingqu technology through iterations of its own Ascend products, then opening the core protocol to drive cross-industry standard co-construction—along with its long-cycle R&D logic of laying out interconnect technology as early as 2019, offers a vivid case study for commercialization of underlying deep tech and for industrial policies supporting long-term basic R&D.